RTL Coding Guidelines - 2024.2 English - 2024.1 English

UltraFast Design Methodology Guide for FPGAs and SoCs (UG949)

Document ID
UG949
Release Date
2024-11-13
Version
2024.2 English

You can create custom RTL to implement interconnect logic functions as well as functions without suitable IP. For optimal results, follow the coding guidelines in this section. For additional guidelines, see this link in the Vivado Design Suite User Guide: Synthesis (UG901).