Analyzing a Design at Different Stages Using Checkpoints - 2024.1 English

UltraFast Design Methodology Guide for FPGAs and SoCs (UG949)

Document ID
UG949
Release Date
2024-05-30
Version
2024.1 English

The Vivado Design Suite uses a physical design database to store placement and routing information. Design checkpoint files (.dcp) allow you to save (write_checkpoint command) and restore (read_checkpoint command) this physical database at key points in the design flow. Checkpoints are a snapshot of the design at a specific point in the flow. In Project Mode, the Vivado tools automatically generate design checkpoint files and store them in the implementation runs directory. These can be opened in a separate instance of the Vivado tools.

This design checkpoint file includes the following:

  • Current netlist, including any optimizations made during implementation
  • Design constraints
  • Implementation results

Checkpoint designs can be run through the remainder of the design flow using Tcl commands. They cannot be modified with new design sources.

A few common examples for the use of checkpoints are:

  • Saving results so you can go back and do further analysis on that part of the flow.
  • Trying place_design using multiple directives and saving the checkpoints for each. This would allow you to select the place_design checkpoint with the best timing results for the subsequent implementation steps.

For more information on checkpoints, see the Vivado Design Suite User Guide: Implementation (UG904).