Clock Resource Planning and Assignment - 2024.1 English

UltraFast Design Methodology Guide for FPGAs and SoCs (UG949)

Document ID
UG949
Release Date
2024-06-26
Version
2024.1 English

AMD recommends that you select clocking resources as one of the first steps of your design, well before pinout selection. Your clocking selections can dictate a particular pinout and can also direct logic placement for that logic, especially for stacked silicon interconnect (SSI) technology devices. Proper clocking selections can yield superior results. Consider the following:

  • Constraint creation, particularly in large devices with high utilization in conjunction with clock planning.
  • Manual placement of clocking resources if needed for design closure.
  • Device-specific functionality that might require up-front planning to avoid issues and take advantage of device features. For information on 7 series features, see this link and this link in the 7 Series FPGAs Clocking Resources User Guide (UG472). For information on UltraScale device features, see Clocking Resources in the UltraScale Architecture Clocking Resources User Guide (UG572).