AMBA AXI - 2024.1 English

UltraFast Design Methodology Guide for FPGAs and SoCs (UG949)

Document ID
UG949
Release Date
2024-06-26
Version
2024.1 English

AMD has standardized IP interfaces on the open AMBA® 4 AXI4 interconnect protocol. This standardization eases integration of IP from AMD and third-party providers, and maximizes system performance. AMD has worked with Arm® to define the AXI4, AXI4-Lite, and AXI4-Stream specifications for efficient mapping into its device architectures.

AXI4 is targeted at high performance, high clock frequency system designs, and is suitable for high-speed interconnects. AXI4-Lite is a light-weight version of AXI4, and is used mostly for accessing control and status registers.

AXI4-Stream is used for unidirectional streaming of data from Master to Slave. This is typically used for DSP, Video and Communications applications.