Identifying Pin Compatible Devices - 2024.1 English

UltraFast Design Methodology Guide for FPGAs and SoCs (UG949)

Document ID
UG949
Release Date
2024-05-30
Version
2024.1 English

It is often difficult to predict the final device size for any given design during initial planning. Logic can be added or removed during the course of the design cycle, which can result in the need to change the device size. The Vivado tools enable you to identify alternate devices to ensure that the I/O pin configuration defined is compatible across all selected devices, as long as the package is the same. For information, see this link in the Vivado Design Suite User Guide: I/O and Clock Planning (UG899).

Important: The device must be in the same package.
Tip: To migrate your design with reduced risk, carefully plan the following at the beginning of the design process: device selection, pinout selection, and design criteria. Take the following into account when migrating to a larger or smaller device in the same package: pinout, clocking, and resource management.