About the UltraFast Design Methodology - 2024.1 English

UltraFast Design Methodology Guide for FPGAs and SoCs (UG949)

Document ID
UG949
Release Date
2024-05-30
Version
2024.1 English

The AMD UltraFast™ design methodology is a set of best practices intended to help streamline the design process for AMD UltraScale™ , AMD UltraScale+™ , 7 series, and older device families. The size and complexity of these designs require specific steps and design tasks to ensure success at each stage of the design. Following these steps and adhering to the best practices will help you achieve your desired design goals as quickly and efficiently as possible.

  • This guide, which describes the various design tasks, analysis and reporting features, and best practices for design creation and closure.
  • UltraFast Design Methodology Quick Reference Guide (UG1231), which highlights key design methodology steps in an easy-to-use, double-sided card format.
  • UltraFast Design Methodology Timing Closure Quick Reference Guide (UG1292), which covers recommendations for closing timing, including running initial design checks, baselining the design, and resolving timing violations.
  • UltraFast Design Methodology Checklist (XTP301), which is available in the AMD Documentation Navigator and as a standalone spreadsheet. You can use this checklist to identify common mistakes and decision points throughout the design process.
  • UltraFast Design Methodology System-Level Design Flow diagram representing the entire AMD Vivado™ Design Suite design flow, which is available in the AMD Documentation Navigator. You can click a design step in the diagram to open related documentation, collateral, and FAQs to help get you started.

AMD provides the following resources to help you take advantage of the UltraFast design methodology:

Tip: AMD also provides methodology-related design rule checks (DRCs) for each design stage, which are available using the report_methodology Tcl command in the Vivado Design Suite.