Analyzing Your Power Estimation and Optimization Results - 2024.1 English

UltraFast Design Methodology Guide for FPGAs and SoCs (UG949)

Document ID
UG949
Release Date
2024-06-26
Version
2024.1 English

Once you have generated the power estimation report using report_power, AMD recommends the following:

  • Examine the total power in the Summary section. Does the total power and junction temperature fit into your thermal and power budget?
  • If the results are substantially over budget, review the power summary distribution by block type and by the power rails. This provides an idea of the highest power consuming blocks.
  • Review the Hierarchy section. The breakdown by hierarchy provides a good idea of the highest power consuming module. You can drill down into a specific module to determine the functionality of the block. You can also cross-probe in the GUI to determine how specific sections of the module have been coded, and whether there are power efficient ways to recode it.
    Note: If the design has a timing margin, conduct multiple runs to evaluate if any of the runs have a better total power. For example, a design that has 2 ps of margin can perform similarly to a design with 15 ps, but the 2 ps design might have lower power.