Using Vivado Design Suite HDL Templates - 2024.1 English

UltraFast Design Methodology Guide for FPGAs and SoCs (UG949)

Document ID
UG949
Release Date
2024-05-30
Version
2024.1 English

Use the Vivado Design Suite Language Templates when creating RTL or instantiating AMD primitives. The Language Templates include recommended coding constructs for proper inference to the AMD device architecture. Using the Language Templates can ease the design process and lead to improved results. To open the Language Templates from the Vivado IDE, select the Language Templates option in the Flow Navigator, and select the desired template.