Apply Attributes at the Module Level - 2024.1 English

UltraFast Design Methodology Guide for FPGAs and SoCs (UG949)

Document ID
UG949
Release Date
2024-05-30
Version
2024.1 English

Applying attributes at the module level can keep code tidier and more scalable. Instead of having to apply an attribute at the signal level, you can apply the attribute at the module level and have the attribute propagated to all signals declared in the current hierarchy. Applying attributes at the module level also allows you to override global synthesis options.

CAUTION:
Unlike other attributes, the DONT_TOUCH attribute does not propagate from a module to all the signals inside the module. For more information, see this link in the Vivado Design Suite User Guide: Synthesis (UG901).