Avoid Floorplanning and Overconstraining - 2024.1 English

UltraFast Design Methodology Guide for FPGAs and SoCs (UG949)

Document ID
UG949
Release Date
2024-06-26
Version
2024.1 English

When using the incremental implementation flow, avoid the following:

  • Do not floorplan incremental implementation runs.

    Pblock placement is overridden by reference checkpoint placement.

  • Do not overconstrain the placer.

    Overconstraining the design in the incremental implementation run can severely impact reuse, because the tools try to meet a target WNS that is artificially altered. To avoid overconstraining, do one of the following:

    • Remove any overconstraining at the placer by modifying the constraints that are applied.
    • Apply the following command to the incremental run.
      Note: This command does not affect non-incremental runs but ignores all user-applied clock uncertainty constraints.
      config_implementation { {incr.ignore_user_clock_uncertainty 1}}