QDMA_VF_MAILBOX (0x5000) - 2.0 English

Versal Adaptive SoC DMA and Bridge Subsystem for PCI Express Product Guide (PG344)
Document ID
PG344
Release Date
2024-06-03
Version
2.0 English
Table 1. QDMA_VF_MAILBOX (0x05000) Register Space
Registers (Address) Address Description
Function Status Register (0x5000) 0x5000 Status register bits
Function Command Register (0x5004) 0x5004 Command register bits
Function Interrupt Vector Register (0x5008) 0x5008 Interrupt vector register
Target Function Register (0x500C) 0x500C Target Function register
Function Interrupt Control Register (0x5010) 0x5010 Interrupt Control Register
RTL Version Register (0x5014) 0x5014 RTL Version Register
Incoming Message Memory (0x5800-0x587C) 0x5800-0x587C Incoming message (128 bytes)
Outgoing Message Memory (0x5C00-0x5C7C) 0x5C00-0x5C7C Outgoing message (128 bytes)