VDM_MESSAGE_READ (0x0A4) - 2.0 English

Versal Adaptive SoC DMA and Bridge Subsystem for PCI Express Product Guide (PG344)

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Table 1. VDM Message Read (0x0A4)
Bit Default Access Type Description
[31:0]   RO VDM message read

Vendor Defined Message (VDM) messages, st_rx_msg_data, are stored in FIFO in the example design. A read to this register (0x0A4) will pop out one 32-bit message at a time.