Bit | Default | Access Type | Description |
---|---|---|---|
[31:0] | RO | VDM message read |
Vendor Defined Message (VDM) messages, st_rx_msg_data
, are stored in FIFO in the example design. A read to this
register (0x0A4) will pop out one 32-bit message at a time.
Bit | Default | Access Type | Description |
---|---|---|---|
[31:0] | RO | VDM message read |
Vendor Defined Message (VDM) messages, st_rx_msg_data
, are stored in FIFO in the example design. A read to this
register (0x0A4) will pop out one 32-bit message at a time.