QDMA PF Address Register Space - 2.0 English

Versal Adaptive SoC DMA and Bridge Subsystem for PCI Express Product Guide (PG344)

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2.0 English

All the physical function (PF) registers are listed in the qdma_v5_0_pf_registers.csv available in the Register Reference File.

Tip: When you generate the IP in default mode, not all registers are exposed. For example, debug registers will be missing. Refer to the qdma_v5_0_pf_registers.csv file to identify the debug registers. To expose all registers, use the following tcl command during IP generation:

set_property CONFIG.debug_mode {DEBUG_REG_ONLY} [get_ips qdma_0]

Table 1. QDMA PF Address Register Space
Register Name Base (Hex) Byte Size (Dec) Register List and Details
QDMA_CSR 0x0000 9216 QDMA Configuration Space Register (CSR) found in qdma_v5_0_pf_registers.csv.
QDMA_TRQ_SEL_QUEUE_PF 0x18000 32768 Also found in QDMA_TRQ_SEL_QUEUE_PF (0x18000).
QDMA_PF_MAILBOX 0x22400 16384 Also found in QDMA_PF_MAILBOX (0x22400).
QDMA_TRQ_MSIX 0x30000 32768 Also found in QDMA_TRQ_MSIX (0x30000).
QDMA_TRQ_MSIX_PBA 0x34000 256 QDMA_TRQ_MSIX_PBA (0x34000)