Bit Index | Default | Access Type | Description |
---|---|---|---|
[NUM_USR_INT-1:0] | 'h0 | RW |
user_int_enmask User Interrupt Enable Mask 0: Prevents an interrupt from being generated when the user interrupt source is asserted. 1: Generates an interrupt on the rising edge of the user interrupt source. If the Enable Mask is set and the source is already set, a user interrupt will be generated also. |