IRQ Block User Interrupt Pending (0x48) - 2.0 English

IRQ Block User Interrupt Pending (0x48) - 2.0 English - PG344

Versal Adaptive SoC DMA and Bridge Subsystem for PCI Express Product Guide (PG344)

Document ID

PG344

Release Date

2024-11-22

Version

2.0 English

Table 1. IRQ Block User Interrupt Pending (0x48)
Bit Index	Default	Access Type	Description
[NUM_USR_INT-1:0]	‘h0	RO	user_int_pend User Interrupt Pending. This register indicates pending events. The pending events are cleared by removing the event cause condition at the source component.