PCIe CQ/CC - 2.0 English

Versal Adaptive SoC DMA and Bridge Subsystem for PCI Express Product Guide (PG344)

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2.0 English

The PCIe Completer Request (CQ)/Completer Completion (CC) modules receive and process TLP requests from the remote PCIe agent. This interface to the AMD Versal Adaptive SoC Integrated Block for PCIe IP operates in an address aligned mode. The module uses the BAR information from the Integrated Block for PCIe IP to determine where the request should be forwarded. The possible destinations for these requests are:

  • DMA configuration module
  • AXI4 Bridge Master interface
  • the AXI4-Lite Bridge Master interface

Non-posted requests are expected to receive completions from the destination, which are forwarded to the remote PCIe agent. For further details, see the Versal Adaptive SoC Integrated Block for PCI Express LogiCORE IP Product Guide (PG343).