AXI Verification IP Attached to the AXI Slave Interface - 2.0 English

Versal Adaptive SoC DMA and Bridge Subsystem for PCI Express Product Guide (PG344)

Document ID
PG344
Release Date
2023-11-10
Version
2.0 English

AXI Verification IP allows you to initiate AXI transfer from an Endpoint configured bridge or generates a larger more complex AXI transfer from a Root Port configured bridge. For more details, see the AXI Verification IP LogiCORE IP Product Guide (PG267).

To enable AXI Verification IP example design option:

  1. Add the IP to the design.
  2. Run the following Tcl command in AMD Vivado™ console:
    set_property CONFIG.axi_vip_in_exdes true [get_ips <ip_name>]
  3. Open the IP Example Design.

The following figure shows the IP in Root Port configuration.

Figure 1. Root Port Configuration

The following figure shows the AXI Bridge Subsystem for PCIe IP in Endpoint configuration.

Figure 2. Endpoint Configuration