AXI4-Lite Slave Register Space - 2.0 English - PG344

Versal Adaptive SoC DMA and Bridge Subsystem for PCI Express Product Guide (PG344)

Document ID
PG344
Release Date
2024-11-22
Version
2.0 English

DMA queue space registers can be accessed through the AXI4-Lite Slave interface.

QDMA Queue space PF register addresses and QDMA Queue space VF register addresses are described in QDMA_TRQ_SEL_QUEUE_PF (0x18000) and QDMA_TRQ_SEL_QUEUE_VF (0x3000).
Note: Through this interface, only the DMA Queue space registers can be accessed. DMA CSR register can be accessed only through AXI4-Lite Slave CSR interface.

In Bridge mode (Bit[28] = 0) address 0x00 to 0xE00 are directed to the PCIe Core configuration register space (ECAM).