Config AXI User Max Read Request Size (0x44) - 2.0 English

Versal Adaptive SoC DMA and Bridge Subsystem for PCI Express Product Guide (PG344)

Document ID
PG344
Release Date
2024-11-22
Version
2.0 English
Table 1. Config AXI User Max Read Request Size (0x44)
Bit Index Default Access Type Description
6:4 3’h5 RO

user_eff_read

Maximum read request size issued to the user application. This value may be lower than user_max_read due to PCIe configuration or datapath width.

3'b000: 128 bytes

3'b001: 256 bytes

3'b010: 512 bytes

3'b011: 1024 bytes

3'b100: 2048 bytes

3'b101: 4096 bytes

3     Reserved
2:0 3’h5 RW

user_prg_read

Maximum read request size issued to the user application.

3'b000: 128 bytes

3'b001: 256 bytes

3'b010: 512 bytes

3'b011: 1024 bytes

3'b100: 2048 bytes

3'b101: 4096 bytes