The H2C channel register space is described in this section.
| Address (hex) | Register Name |
|---|---|
| 0x00 | H2C Channel Identifier (0x00) |
| 0x04 | H2C Channel Control (0x04) |
| 0x08 | H2C Channel Control (0x08) |
| 0x0C | H2C Channel Control (0x0C) |
| 0x40 | H2C Channel Status (0x40) |
| 0x44 | H2C Channel Status (0x44) |
| 0x48 | H2C Channel Completed Descriptor Count (0x48) |
| 0x4C | H2C Channel Alignments (0x4C) |
| 0x88 | H2C Poll Mode Low Write Back Address (0x88) |
| 0x8C | H2C Poll Mode High Write Back Address (0x8C) |
| 0x90 | H2C Channel Interrupt Enable Mask (0x90) |
| 0x94 | H2C Channel Interrupt Enable Mask (0x94) |
| 0x98 | H2C Channel Interrupt Enable Mask (0x98) |
| 0xC0 | H2C Channel Performance Monitor Control (0xC0) |
| 0xC4 | H2C Channel Performance Cycle Count (0xC4) |
| 0xC8 | H2C Channel Performance Cycle Count (0xC8) |
| 0xCC | H2C Channel Performance Data Count (0xCC) |
| 0xD0 | H2C Channel Performance Data Count (0xD0) |