Config Block PCIE Max Read Request Size (0x0C) - 2.0 English

Versal Adaptive SoC DMA and Bridge Subsystem for PCI Express Product Guide (PG344)

Document ID
PG344
Release Date
2024-06-03
Version
2.0 English
Table 1. Config Block PCIE Max Read Request Size (0x0C)
Bit Index Default Access Type Description
[2:0] PCIe IP RO

pcie_max_read

Maximum read request size. This is the lesser of the PCIe IP MRRS and XDMA parameters.

3'b000: 128 bytes

3'b001: 256 bytes

3'b010: 512 bytes

3'b011: 1024 bytes

3'b100: 2048 bytes

3'b101: 4096 bytes