Marker Response - 2.0 English

Versal Adaptive SoC DMA and Bridge Subsystem for PCI Express Product Guide (PG344)

Document ID
Release Date
2.0 English

Marker responses can be generated for any descriptor by setting the mrkr_req bit. Marker responses are generated after the descriptor is completed. Similar to host writebacks, excessive marker response requests can reduce descriptor engine performance. Along with mrkr_req signals, sdi can also be set. In this case, the marker response is sent on queue status ports and writeback is sent to the host. The marker responses are sent on queue status ports that can be identified by the queue id.

Descriptor completion is defined as when the descriptor data transfer has completed and its write data is acknowledged on AXI (H2C bresp for AXI4, Valid/Ready of ST), or is accepted by the PCIe Controller’s transaction layer for transmission (C2H MM).