AXI Memory Mapped Descriptor for H2C and C2H (32B)

AXI Memory Mapped Descriptor for H2C and C2H (32B) - 2.0 English

Versal Adaptive SoC DMA and Bridge Subsystem for PCI Express Product Guide (PG344)

Document ID

PG344

Release Date

2024-06-03

Version

2.0 English

Table 1. AXI Memory Mapped Descriptor Structure for H2C and C2H
Bit	Bit Width	Field Name	Description
[255:192]	64	reserved	Reserved
[191:128]	64	dst_addr	Destination Address
[127:92]	36	reserved	Reserved
[91:64]	16	lengthInByte	Read length in byte (64K-1)
[63:0]	64	src_addr	Source Address

Internal mode memory mapped DMA must configure the descriptor queue to be 32B and follow the above descritor format. In bypass mode, the descriptor format is defined by the user logic, which must drive the H2C or C2H MM bypass input port.