The QDMA supports the legacy interrupt for physical function, and it is expected that the single queue will be associated with interrupt.
To enable the legacy interrupt, the software needs to set the en_lgcy_intr bit in the register
QDMA_GLBL_GLBL_INTERRUPT_CFG (0x2C4). When en_lgcy_intr
is set, the QDMA will not send out MSI-X interrupt.
When the legacy interrupt wire INTA is asserted, the QDMA hardware sets the
lgcy_intr_pending bit in the
QDMA_GLBL_GLBL_INTERRUPT_CFG (0x2C4) register. When the software receives the legacy
interrupt, it needs to clear the lgcy_intr_pending bit.
The hardware will keep the legacy interrupt wire asserted until the software clears the
lgcy_intr_pending bit.Note: INTB, INTC, and INTD legacy interrupts are not supported.