AXI4-Lite Bridge Slave CSR Interface - 2.0 English - PG344

The AXI4-Lite slave interface is used to access the AXI Bridge and QDMA internal registers. Address bit [15] indicates if the access is for QDMA registers or AXI Bridge registers.

• When s_axil_csr_awaddr[15] = 1'b1, the write access is for QDMA CSR registers.
• When s_axil_csr_awaddr[15] = 1'b0, the write access is for Bridge registers (When accessing Bridge Registers, access from address 0x000 to 0xDFF will be redirected to PCIe core configuration space access and from address 0xE00 will be directed towards Bridge registers).
• When s_axil_csr_araddr[15] = 1'b1, the read access is for QDMA CSR registers.
• When s_axil_csr_araddr[15] = 1'b0, the read access is for Bridge registers. When accessing Bridge Registers, access from address 0x000 to 0xDFF will be redirected to PCIe core configuration space access and from address 0xE00 will be directed towards Bridge registers.

The QDMA registers are virtualized for VFs and PFs. For example, VFs and PFs can access different parts of the address space, and each has access to its own queues. To accommodate the function specific accesses, the user logic can provide function ID on s_axil_awuser[7:0] for write access and s_axil_aruser[7:0] read access, which gives the QDMA proper internal register access. One outstanding read request and one outstanding write request are supported on the AXI4-Lite slave interface.

The AXI4-Lite slave interface is also used to generate Vendor defined messages (VDM) using the Bridge registers.