Example Design Elements - 1.0 English

The PIO example design elements include:

• Core wrapper
• An example Verilog HDL wrapper (instantiates the cores and example design)
• A customizable demonstration test bench to simulate the example design

The example design has been tested and verified with Vivado Design Suite and these simulators:

• Vivado simulator
• Questa Advanced Simulator
• Synopsys Verilog Compiler Simulator (VCS)

For the supported versions of these tools, see the Vivado Design Suite User Guide: Release Notes, Installation, and Licensing (UG973).