Output Logging - 1.0 English

Versal Adaptive SoC Integrated Block for PCI Express LogiCORE IP Product Guide (PG343)

Document ID
PG343
Release Date
2024-05-30
Version
1.0 English

The test bench outputs messages, captured in the simulation log, indicate the time at which these occur:

  • user_reset deasserted
  • user_lnk_up asserted
  • cfg_done asserted by the Configurator
  • pio_test_finished asserted by the PIO Master
  • Simulation Timeout (if pio_test_finished or pio_test_failed never asserted)