TILE - 2024.1 English

Vivado Design Suite Properties Reference Guide (UG912)

Document ID
UG912
Release Date
2024-05-30
Version
2024.1 English

Description

A TILE is a device object containing one or more SITE objects. Programmable logic TILEs include diverse objects such as SLICE/CLBs, BRAM, DSPs, I/O Blocks, Clock resources, and GT blocks. Structurally, each tile has a number of inputs and outputs and the programmable interconnect to connect the inputs and outputs of a tile to any other tile.

There are many different types of TILEs, depending on the AMD device in use. Available TILE_TYPEs include the following:

AMS_ADC_TOP AMS_BRAM 
AMS_CLB_INTF_IOB AMS_CLK AMS_CMT
AMS_DAC_TOP AMS_DRP_ADC_TOP AMS_DRP_DAC_TOP
AMS_DSP AMS_INT AMS_INT_L AMS_INT_R 
AMS_IOI AMS_VBRK_INTF 
BRAM_INT_INTERFACE_L BRAM_INT_INTERFACE_R 
BRAM_L BRAM_R
BRKH_BRAM BRKH_B_TERM_INT 
BRKH_CLB BRKH_CLK BRKH_CMT 
BRKH_DSP_L BRKH_DSP_R BRKH_GTX
BRKH_INT BRKH_TERM_INT B_TERM_INT B_TERM_INT_SLV 
CFG_CENTER_BOT CFG_CENTER_MID 
CFG_CENTER_MID_SLAVE CFG_CENTER_TOP CFG_CENTER_TOP_SLAVE
CLBLL_L CLBLL_R CLBLM_L CLBLM_R
CLK_BALI_REBUF CLK_BALI_REBUF_GTZ_BOT CLK_BALI_REBUF_GTZ_TOP 
CLK_BUFG_BOT_R CLK_BUFG_REBUF CLK_BUFG_TOP_R
CLK_FEED
CLK_HROW_BOT_R CLK_HROW_TOP_R 
CLK_MTBF2
CLK_PMV CLK_PMV2 CLK_PMV2_SVT CLK_PMVIOB 
CLK_TERM
CMT_FIFO_L CMT_FIFO_R 
CMT_PMV CMT_PMV_L
CMT_TOP_L_LOWER_B CMT_TOP_L_LOWER_T 
CMT_TOP_L_UPPER_B CMT_TOP_L_UPPER_T 
CMT_TOP_R_LOWER_B CMT_TOP_R_LOWER_T 
CMT_TOP_R_UPPER_B CMT_TOP_R_UPPER_T 
DSP_L DSP_R
GTH_CHANNEL_0 GTH_CHANNEL_1 GTH_CHANNEL_2 GTH_CHANNEL_3 GTH_COMMON 
GTH_INT_INTERFACE GTH_INT_INTERFACE_L
GTX_CHANNEL_0 GTX_CHANNEL_1 GTX_CHANNEL_2 GTX_CHANNEL_3 GTX_COMMON 
GTX_INT_INTERFACE GTX_INT_INTERFACE_L
GTZ_BOT GTZ_BRAM
GTZ_CLB_INTF_IOB GTZ_CLK GTZ_CLK_B GTZ_CMT 
GTZ_DSP
GTZ_INT GTZ_INT_L GTZ_INT_LB GTZ_INT_R GTZ_INT_RB 
GTZ_IOI GTZ_TOP GTZ_VBRK_INTF
HCLK_BRAM HCLK_CLB 
HCLK_CMT HCLK_CMT_L 
HCLK_DSP_L HCLK_DSP_R
HCLK_FEEDTHRU_1 HCLK_FEEDTHRU_2 
HCLK_FIFO_L
HCLK_GTX
HCLK_INT_INTERFACE HCLK_IOB 
HCLK_IOI HCLK_IOI3
HCLK_L HCLK_L_BOT_UTURN HCLK_L_SLV HCLK_L_TOP_UTURN 
HCLK_R HCLK_R_BOT_UTURN HCLK_R_SLV HCLK_R_TOP_UTURN 
HCLK_TERM HCLK_TERM_GTX HCLK_VBRK HCLK_VFRAME 
INT_FEEDTHRU_1 INT_FEEDTHRU_2
INT_INTERFACE_L INT_INTERFACE_R 
INT_L INT_L_SLV INT_L_SLV_FLY 
INT_R INT_R_SLV INT_R_SLV_FLY
IO_INT_INTERFACE_L IO_INT_INTERFACE_R 
LIOB18 LIOB18_SING LIOB33 LIOB33_SING
LIOI LIOI3 LIOI3_SING LIOI3_TBYTESRC LIOI3_TBYTETERM 
LIOI_SING LIOI_TBYTESRC LIOI_TBYTETERM
L_TERM_INT L_TERM_INT_BRAM
MONITOR_BOT MONITOR_BOT_SLAVE MONITOR_MID MONITOR_TOP 
NULL
PCIE3_BOT_RIGHT PCIE3_INT_INTERFACE_L PCIE3_INT_INTERFACE_R 
PCIE3_RIGHT PCIE3_TOP_RIGHT PCIE_BOT
PCIE_BOT_LEFT PCIE_INT_INTERFACE_L PCIE_INT_INTERFACE_LEFT_L
PCIE_INT_INTERFACE_R
PCIE_NULL PCIE_TOP PCIE_TOP_LEFT 
RIOB18 RIOB18_SING RIOI RIOI_SING 
RIOI_TBYTESRC RIOI_TBYTETERM 
R_TERM_INT R_TERM_INT_GTX 
TERM_CMT
T_TERM_INT T_TERM_INT_SLV 
VBRK VBRK_EXT
VFRAME
Figure 1. TILE Objects

Related Objects

TILE objects are associated with SLR, CLOCK_REGION, SITE, SITE_PIN, BEL and BEL_PIN device resources, with NODE, WIRE, and PIP routing resources, and with the NET netlist object.

For example, you can query the TILE of a related object using the following command, which returns the tiles the specified net travels through:

get_tiles -of_objects [get_nets wbClk]

In addition, you can query the SLR, CLOCK_REGION, NODE, PIP, WIRE, SITE, BEL, and NET objects associated with or found in a TILE.

get_bels -of_objects [get_tiles -filter {TILE_TYPE == GTX_CHANNEL_1}]

Properties

Although there are many different types of TILE objects, as represented by the TILE_TYPE property, all TILE objects have the same set of properties.

You can use the report_property command to report the properties of a TILE object. Refer to the Vivado Design Suite Tcl Command Reference Guide (UG835) for more information.

The properties on a CLBLL type of TILE object include the following, with example values:

Property	Type	Read-only	Visible	Value
CLASS	string	true	true	tile
COLUMN	int	true	true	50
DEVICE_ID	int	true	true	0
FIRST_SITE_ID	int	true	true	46
GRID_POINT_X	int	true	true	50
GRID_POINT_Y	int	true	true	1
INDEX	int	true	true	167
INT_TILE_X	int	true	true	17
INT_TILE_Y	int	true	true	0
IS_CENTER_TILE	bool	true	true	1
IS_DCM_TILE	bool	true	true	0
IS_GT_CLOCK_SITE_TILE	bool	true	true	0
IS_GT_SITE_TILE	bool	true	true	0
NAME	string	true	true	CLBLL_L_X18Y199
NUM_ARCS	int	true	true	146
NUM_SITES	int	true	true	2
ROW	int	true	true	1
SLR_REGION_ID	int	true	true	0
TILE_PATTERN_IDX	int	true	true	13
TILE_TYPE	enum	true	true	CLBLL_L
TILE_TYPE_INDEX	int	true	true	19
TILE_X	int	true	true	-16260
TILE_Y	int	true	true	320944
TYPE	string	true	true	CLBLL_L

To report the properties for any of the TILE_TYPEs listed previously, you can use the following form of the report_property command:

report_property -all [lindex [get_sites -filter {TILE_TYPE == <TILE_TYPE>}] 0]

Where <SITE_TYPE> should be replaced by one of the listed SITE types. For example:

report_property -all [lindex [get_tiles -filter {TILE_TYPE == DSP_L}] 0] 
report_property -all [lindex [get_tiles -filter {TILE_TYPE == BRAM_L}] 0] 
report_property -all [lindex [get_tiles -filter {TILE_TYPE == GTX_CHANNEL_1}] 0]