HW_SIO_TX - 2024.1 English

Vivado Design Suite Properties Reference Guide (UG912)

Document ID
UG912
Release Date
2024-05-30
Version
2024.1 English

Description

On the hardware device, each GT includes an independent transmitter, hw_sio_tx, which consists of a PCS and a PMA. Parallel data flows from the device logic into the FPGA TX interface, through the PCS and PMA, and then out the TX driver as high-speed serial data.

Related Objects

See Figure 1 for an illustration of the relationship that the HW_SIO_TX object has with other hardware objects. HW_SIO_TX objects are associated with hw_server, hw_target, hw_device, hw_sio_ibert, hw_sio_gt, or hw_sio_link objects. You can query the HW_SIO_TX objects of associated objects:

get_hw_sio_txs -of [get_hw_sio_gts]

And you can query the objects associated with a specific HW_SIO_TX:

get_hw_sio_links -of [get_hw_sio_txs]

Properties

You can use the report_property command to report the properties assigned to a specific HW_SIO_TX object. Refer to the Vivado Design Suite Tcl Command Reference Guide (UG835) for more information. The properties assigned to HW_ILA objects include the following, with example values:

Property	Type	Read-only	Visible	Value
CLASS	string	true	true	hw_sio_tx
DISPLAY_NAME	string	true	true	MGT_X0Y8/TX
DRP.TXBUF_EN	string	false	true	1
DRP.TXBUF_RESET_ON_RATE_CHANGE	string	false	true	0
DRP.TXDLY_CFG	string	false	true	001F
DRP.TXDLY_LCFG	string	false	true	030
DRP.TXDLY_TAP_CFG	string	false	true	0000
DRP.TXGEARBOX_EN	string	false	true	0
DRP.TXOUT_DIV	string	false	true	0
DRP.TXPCSRESET_TIME	string	false	true	01
DRP.TXPHDLY_CFG	string	false	true	084020
DRP.TXPH_CFG	string	false	true	0780
DRP.TXPH_MONITOR_SEL	string	false	true	00
DRP.TXPMARESET_TIME	string	false	true	01
DRP.TX_CLK25_DIV	string	false	true	04
DRP.TX_CLKMUX_PD	string	false	true	1
DRP.TX_DATA_WIDTH	string	false	true	5
DRP.TX_DEEMPH0	string	false	true	00
DRP.TX_DEEMPH1	string	false	true	00
DRP.TX_DRIVE_MODE	string	false	true	00
DRP.TX_EIDLE_ASSERT_DELAY	string	false	true	6
DRP.TX_EIDLE_DEASSERT_DELAY	string	false	true	4
DRP.TX_INT_DATAWIDTH	string	false	true	1
DRP.TX_LOOPBACK_DRIVE_HIZ	string	false	true	0
DRP.TX_MAINCURSOR_SEL	string	false	true	0
DRP.TX_MARGIN_FULL_0	string	false	true	4E
DRP.TX_MARGIN_FULL_1	string	false	true	49
DRP.TX_MARGIN_FULL_2	string	false	true	45
DRP.TX_MARGIN_FULL_3	string	false	true	42
DRP.TX_MARGIN_FULL_4	string	false	true	40
DRP.TX_MARGIN_LOW_0	string	false	true	46
DRP.TX_MARGIN_LOW_1	string	false	true	44
DRP.TX_MARGIN_LOW_2	string	false	true	42
DRP.TX_MARGIN_LOW_3	string	false	true	40
DRP.TX_MARGIN_LOW_4	string	false	true	40
DRP.TX_PREDRIVER_MODE	string	false	true	0
DRP.TX_QPI_STATUS_EN	string	false	true	0
DRP.TX_RXDETECT_CFG	string	false	true	1832
DRP.TX_RXDETECT_REF	string	false	true	4
DRP.TX_XCLK_SEL	string	false	true	0
LOGIC.ERR_INJECT_CTRL	string	false	true	0
LOGIC.TXOUTCLK_FREQ_CNT	string	false	true	0000
LOGIC.TXOUTCLK_FREQ_TUNE	string	false	true	4000
LOGIC.TXPAT_ID	string	false	true	1
LOGIC.TXUSRCLK2_FREQ_CNT	string	false	true	0000
LOGIC.TXUSRCLK2_FREQ_TUNE	string	false	true	4000
LOGIC.TXUSRCLK_FREQ_CNT	string	false	true	0000
LOGIC.TXUSRCLK_FREQ_TUNE	string	false	true	4000
LOGIC.TX_DCM_LOCK	string	false	true	1
LOGIC.TX_DCM_RESET_CTRL	string	false	true	0
LOGIC.TX_DCM_RESET_STAT	string	false	true	1
LOGIC.TX_FRAMED	string	false	true	0
NAME	string	true	true	
localhost/xilinx_tcf/Digilent/210203327463A/0_1/IBERT/Quad_117/MGT_X0Y8/TX PARENT	string	true	true localhost/xilinx_tcf/Digilent/210203327463A/0_1/IBERT/Quad_117/MGT_X0Y8
PORT.GTTXRESET	string	false	true	0
PORT.TX8B10BBYPASS	string	false	true	FF
PORT.TX8B10BEN	string	false	true	0
PORT.TXBUFDIFFCTRL	string	false	true	4
PORT.TXBUFSTATUS	string	false	true	0
PORT.TXCHARDISPMODE	string	false	true	00
PORT.TXCHARDISPVAL	string	false	true	00
PORT.TXCHARISK	string	false	true	00
PORT.TXCOMFINISH	string	false	true	0
PORT.TXCOMINIT	string	false	true	0
PORT.TXCOMSAS	string	false	true	0
PORT.TXCOMWAKE	string	false	true	0
PORT.TXDEEMPH	string	false	true	0
PORT.TXDETECTRX	string	false	true	0
PORT.TXDIFFCTRL	string	false	true	C
PORT.TXDIFFPD	string	false	true	0
PORT.TXDLYBYPASS	string	false	true	1
PORT.TXDLYEN	string	false	true	0
PORT.TXDLYHOLD	string	false	true	0
PORT.TXDLYOVRDEN	string	false	true	0
PORT.TXDLYSRESET	string	false	true	0
PORT.TXDLYSRESETDONE	string	false	true	0
PORT.TXDLYUPDOWN	string	false	true	0
PORT.TXELECIDLE	string	false	true	0	
PORT.TXGEARBOXREADY	string	false	true	0	
PORT.TXHEADER	string	false	true	0	
PORT.TXINHIBIT	string	false	true	0	
PORT.TXMAINCURSOR	string	false	true	00	
PORT.TXMARGIN	string	false	true	0	
PORT.TXOUTCLKFABRIC	string	false	true	1	
PORT.TXOUTCLKPCS	string	false	true	0	
PORT.TXOUTCLKSEL	string	false	true	2	
PORT.TXPCSRESET	string	false	true	0	
PORT.TXPD	string	false	true	0	
PORT.TXPDELECIDLEMODE	string	false	true	0	
PORT.TXPHALIGN	string	false	true	0	
PORT.TXPHALIGNDONE	string	false	true	0	
PORT.TXPHALIGNEN	string	false	true	0	
PORT.TXPHDLYPD	string	false	true	0	
PORT.TXPHDLYRESET	string	false	true	0	
PORT.TXPHDLYTSTCLK	string	false	true	0	
PORT.TXPHINIT	string	false	true	0	
PORT.TXPHINITDONE	string	false	true	0	
PORT.TXPHOVRDEN	string	false	true	0	
PORT.TXPISOPD	string	false	true	0	
PORT.TXPMARESET	string	false	true	0	
PORT.TXPOLARITY	string	false	true	0	
PORT.TXPOSTCURSOR	string	false	true	03	
PORT.TXPOSTCURSORINV	string	false	true	0	
PORT.TXPRBSFORCEERR	string	false	true	0	
PORT.TXPRBSSEL	string	false	true	0	
PORT.TXPRECURSOR	string	false	true	07	
PORT.TXPRECURSORINV	string	false	true	0	
PORT.TXQPIBIASEN	string	false	true	0	
PORT.TXQPISENN	string	false	true	0	
PORT.TXQPISENP	string	false	true	0	
PORT.TXQPISTRONGPDOWN	string	false	true	0	
PORT.TXQPIWEAKPUP	string	false	true	0	
PORT.TXRATE	string	false	true	0	
PORT.TXRATEDONE	string	false	true	0	
PORT.TXRESETDONE	string	false	true	0	
PORT.TXSEQUENCE	string	false	true	00	
PORT.TXSTARTSEQ	string	false	true	0	
PORT.TXSWING	string	false	true	0	
PORT.TXSYSCLKSEL	string	false	true	3	
PORT.TXUSERRDY	string	false	true	1	
TXDIFFSWING	enum	false	true	1.018	V (1100)
TXOUTCLKSEL	enum	false	true	TXOUTCLKPMA
TXOUT_DIV	enum	false	true	1
TXPLL	enum	false	true	QPLL
TXPOST	enum	false	true	0.68 dB (00011)
TXPRE	enum	false	true	1.67 dB (00111)
TXRATE	enum	false	true	Use TXOUT_DIV
TXUSRCLK2_FREQ	string	false	true	0.048828
TXUSRCLK_FREQ	string	false	true	0.048828
TX_DATA_WIDTH	enum	false	true	40
TX_INTERNAL_DATAPATH	enum	false	true	4-byte
TX_PATTERN	enum	false	true	PRBS 7-bit
TX_PLL	string	true	true	
localhost/xilinx_tcf/Digilent/210203327463A/0_1/IBERT/Quad_117/COMMON_X0Y2/QPLL_0

To report the properties for a HW_SIO_TX object, you can copy and paste the following command into the Vivado Design Suite Tcl shell or Tcl Console:

report_property -all [lindex [get_hw_sio_txs] 0]