The
opt_design -carry_remap
option lets you remap single CARRY* cells into LUTs to improve the routing results
of the design. When using the -carry_remap option,
only single-stage carry chains are converted to LUTs. The CARRY_REMAP property lets
you specify carry chains of greater length to be converted during optimization.
You can control the conversion of individual carry chains of any length by using the CARRY_REMAP cell property. The CARRY_REMAP property value is an integer that specifies the maximum carry chain length to be mapped to LUTs. The CARRY_REMAP property is applied to CARRY* primitives within a chain, and each cell must have the same value to be converted to LUTs during optimization.
Refer to the Vivado Design Suite User Guide: Synthesis (UG901) for more information on optimization.
Architecture Support
All architectures.
Applicable Objects
CARRY Cells (get_cells)
Value
<VALUE>: Specify an integer value that indicates the length of the carry chain
that can be converted to LUTs during opt_design.
- CARRY_REMAP=0: Do not remap.
- CARRY_REMAP=1: Remap single CARRY cells that are not part of a carry chain.
- CARRY_REMAP=2: Remap carry chain with length of 2 or less.
Syntax
- VHDL Syntax
-
Not applicable
- Verilog Syntax
-
Not applicable
- XDC Syntax
-
set_property CARRY_REMAP <value> <objects>XDC Syntax Example:
The following assigns a CARRY_REMAP property to all CARRY8 primitives:
set_property CARRY_REMAP 2 [get_cells -hier -filter {ref_name == CARRY8}]
Affected Steps
- Logic Optimization (Opt Design)