PULLDOWN - 2024.1 English

Vivado Design Suite Properties Reference Guide (UG912)

Document ID
UG912
Release Date
2024-06-05
Version
2024.1 English
Important: The PULLDOWN property has been deprecated and should be replaced by PULLTYPE.

PULLDOWN applies a weak logic low level on a tri-stateable output or bidirectional port to prevent it from floating. The PULLDOWN property guarantees a logic Low level to allow tri-stated nets to avoid floating when not being driven.

Input buffers (for example., IBUF), 3-state output buffers (for example, OBUFT), and bidirectional buffers (for example, IOBUF) can have a weak pull-up resistor, a weak pull-down resistor, or a weak “keeper” circuit. This feature can be invoked by adding the PULLTYPE property with one of the following properties to the port or net object connected to the buffer:

  • PULLUP
  • PULLDOWN
  • KEEPER
Note: When this attribute is applied, the PULLDOWN functionality will not be shown during RTL simulation that can create a functional difference between RTL simulation and the implemented design. This functionality can be verified using a gate-level simulation netlist or else the PULLDOWN UNISIM might be instantiated in the design in place of using this property to reflect this behavior in the RTL simulation.

For more information see the Vivado Design Suite 7 Series FPGA and Zynq 7000 SoC Libraries Guide (UG953) or the UltraScale Architecture Libraries Guide (UG974).

Architecture Support
All architectures.
Applicable Objects
Ports (get_ports): Apply to any top-level port.
Values
  • TRUE|YES: Use a pulldown circuit to avoid signal floating when not being driven.
  • FALSE|NO: Do not use a pulldown circuit (default).

Syntax

Verilog Syntax

Place the Verilog attribute immediately before the module or instantiation. Specify as follows:

(* PULLDOWN = " {YES|NO|TRUE|FALSE}" *)
VHDL Syntax

Declare the VHDL attribute as follows:

attribute pulldown: string;

Specify the VHDL attribute as follows:

attribute pulldown of signal_name : signal is “{YES|NO|TRUE|FALSE}”;
XDC Syntax
set_property PULLDOWN {TRUE|FALSE} [get_ports port_name]

Where port_name is the name of an input, output, or inout port.

XDC Syntax Example:

# Use a pulldown circuit
set_property PULLDOWN TRUE [get_ports wbWriteOut]

Affected Steps

  • Logical to Physical Mapping