Netlist and Device Objects - 2024.1 English

Vivado Design Suite Properties Reference Guide (UG912)

Document ID
UG912
Release Date
2024-05-30
Version
2024.1 English

Vivado Design Suite supports a number of first class objects in the in-memory design database. These objects represent the cells, nets, and ports of the logical design, the device resources of the target AMD device, or platform board, as well as objects used by specific features of the Vivado Design Suite such as block design objects used by IP integrator, or hardware objects used by the Vivado hardware manager. The Vivado Design Suite maps the netlist objects of the logical design onto the device objects of the target device or board. The following figure illustrates the relationships between some of the Vivado tools first class objects. This figure is representative, and is not intended to depict all Vivado tools first class objects, or their relationships.

Figure 1. Netlist and Device Objects

The netlist objects, displayed at the top of the figure above, are part of the logical design for programming into the FPGA. Device objects, shown in the lower half of the figure, are part of the actual physical device, and include area resources such as clock regions, tiles, sites or CLBs. Device objects also include package pins and I/O banks, shown on the left side of the figure, and routing resources such as nodes, wires, and pips, shown on the right in the figure.

Additional categories of first class objects exist in the Vivado Design Suite, such as timing objects, which combine with the netlist design to create timing reports and constrain placement and routing results. Timing objects associated with the netlist and device objects, provide a complete timing analysis of the implemented design. Timing objects include clocks, timing paths, and delay objects.

The relationship between objects is shown by the arrows connecting two objects:

  • A double headed arrow indicates that the relationship can be queried from either direction. For instance, you can query the cells attached to specific nets (get_cells -of_objects [get_nets]), or query the nets connected to specific cells (get_nets -of_objects [get_cells]).
  • A single-ended arrow reflects a relationship that can only be queried in the direction of the arrow. For instance, in Figure 1, you can see that you can query the bels located in specific clock regions (get_bels -of_objects [get_clock_regions]), but you cannot get clock regions associated with specific bels.

A description of first class objects, their relationships to other objects, and the properties defined on those objects follows.

Netlist Objects