Vivado Design Suite Properties Reference Guide (UG912) - 2026.1 English - Documents the properties available for use in the AMD Vivado™ Design Suite. For each property this manual provides a description; supported AMD FPGA devices; applicable logic elements or device resources; accepted values; Verilog, VHDL, and XDC syntax examples; and affected FPGA design flow steps. - UG912

Document_ID

UG912

Release_Date

2026-07-20

Version

2026.1 English