The EXCLUDE_PLACEMENT property is used to indicate that the device resources inside of the area defined by a Pblock should only be used for logic contained in the Pblock.
The default is to allow the Vivado placer to place logic not assigned to a Pblock within the range of resources reserved by the Pblock. This property prevents that, and reserves the logic resources for the Pblock.
Note: This only closes the Pblock's logic resources.
Outside logic can still use routing resources within the area defined by the
Pblock.
- Architecture Support
- All devices
- Applicable Objects
- Pblocks (
get_pblocks) - Values
-
-
TRUE: Reserve the device logic resources inside a Pblock for use by logic assigned to the Pblock, thus preventing placement of outside logic. -
FALSE: Do not reserve logic resources inside the Pblock.
-
Syntax
- Verilog Syntax
-
Not applicable
- VHDL Syntax
-
Not applicable
- XDC Syntax
-
set_property EXCLUDE_PLACEMENT TRUE [get_pblocks test]
Affected Steps
- Floorplanning
- Placement