SITE - 2024.1 English

Vivado Design Suite Properties Reference Guide (UG912)

Document ID
UG912
Release Date
2024-05-30
Version
2024.1 English

Description

A SITE is a device object representing one of many different types of logic resources available on the target AMD FPGA. SITEs include SLICE/CLBs which are collections of basic logic elements (BELs) like look-up-tables (LUTs), flip-flops, muxes, carry logic resources to implement fast addition, subtraction, or comparison operations. SLICE/CLBs have wide multiplexers, and dedicated carry chains running vertically from SLICE to SLICE.

Figure 1. SITE Objects

There are two types of SLICEs in a device:

  • SLICEMs can be configured to act as distributed RAM. Distributed Memory is a configuration feature of certain LUTs so it behaves as a small 64-bit memory.
  • SLICEL LUTs can only function as logic and not memory.

Two SLICEs are grouped together into a configurable logic block (CLB) in 7 series FPGAs.

Two CLBs are grouped together into one TILE object on the device. Each UltraScale architecture CLB contains one SLICE. See the 7 Series FPGAs Configurable Logic Block User Guide (UG474) or UltraScale Architecture Configurable Logic Block User Guide (UG574) for more information.

SITEs also contain varied device resources such as block RAM, DSPs, I/O blocks, Clock resources, and GT blocks.

You utilize device resources by inference from the HDL source by Vivado synthesis, or by instantiating a primitive or macro from the FPGA library, or an IP core from the Vivado IP catalog. The Vivado Design Suite 7 Series FPGA and Zynq-7000 SoC Libraries Guide (UG953) and UltraScale Architecture Libraries Guide (UG974) describe the list of primitives that can be instantiated.

The available SITE types vary depending on the AMD device in use. Some of the SITE types include:

AMS_ADC AMS_DAC
BSCAN BSCAN_JTAG_MONE2
BUFG BUFGCTRL BUFG_LB BUFHCE 
BUFIO BUFMRCE BUFR
CAPTURE
DCIRESET DNA_PORT 
DRP_AMS_ADC DRP_AMS_DAC 
DSP48E1
EFUSE_USR 
FIFO18E1 FIFO36E1 
FRAME_ECC 
GLOBALSIG
GTHE2_CHANNEL GTHE2_COMMON 
GTPE2_CHANNEL GTPE2_COMMON 
GTXE2_CHANNEL GTXE2_COMMON 
GTZE2_OCTAL
IBUFDS_GTE2 ICAP
IDELAYCTRL IDELAYE2 IDELAYE2_FINEDELAY 
ILOGICE2 ILOGICE3
IN_FIFO
IOB IOB18 IOB18M IOB18S 
IOB33 IOB33M IOB33S 
IOBM IOBS
IPAD ISERDESE2 
KEY_CLEAR 
MMCME2_ADV
ODELAYE2 ODELAYE2_FINEDELAY 
OLOGICE2 OLOGICE3
OPAD
OSERDESE2 
OUT_FIFO
PCIE_2_1 PCIE_3_0
PHASER_IN PHASER_IN_ADV PHASER_IN_PHY
PHASER_OUT PHASER_OUT_ADV PHASER_OUT_PHY 
PHASER_REF
PHY_CONTROL 
PLLE2_ADV 
PMV2
RAMB18E1 RAMB36E1 RAMBFIFO36E1 
SLICEL SLICEM
STARTUP TIEOFF 
USR_ACCESS 
XADC

Related Objects

As seen in the figure above, SITEs are related to many different netlist and device objects. Leaf-CELLs like flops and latches are mapped to BELs which are in turn mapped to SITEs like SLICEL and SLICEM, or are mapped directly to SITEs such as BRAMs and DSPs. BELs and SITEs are grouped into TILEs, and are assigned to CLOCK_REGIONs and SLRs on the device. PORTs, PINs, IO_BANKs, and PACKAGE_PINs relate to IO blocks (IOBs) which are also SITEs. SITEs also have pins, or SITE_PINs, that map to NODEs, PIPs, PINs, and NETs. You can query the sites associated with any of these objects as follows:

get_sites -of [get_cells -hier microblaze_0]

You can also use the SITE to query associated objects such as CELL, PORT, BEL, BEL_PIN, CLOCK_REGION, SITE_PIN, SLR, TILE, IO_BANK, IO_STANDARD, PACKAGE_PIN, PKGPIN_BYTEGROUP, PKGPIN_NIBBLE, PIP, and SITE_PIP. For example:

get_clock_regions -of [get_sites DSP48E2_X2Y119]

Properties

There are over 80 different SITE types on AMD FPGA devices, but they all share the following properties, with example values provided:

Property	Type	Read-only	Visible	Value
ALTERNATE_SITE_TYPES	string	true	true	IOB33S IOB33M
CLASS	string	true	true	site
CLOCK_REGION	string	true	true	X0Y6
IS_BONDED	bool	true	true	1
IS_CLOCK_BUFFER	bool	true	true	0
IS_CLOCK_PAD	bool	true	true	0
IS_GLOBAL_CLOCK_BUFFER	bool	true	true	0
IS_GLOBAL_CLOCK_PAD	bool	true	true	0
IS_PAD	bool	true	true	1
IS_REGIONAL_CLOCK_BUFFER	bool	true	true	0
IS_REGIONAL_CLOCK_PAD	bool	true	true	0
IS_RESERVED	bool	true	true	0
IS_TEST	bool	true	true	0
IS_USED	bool	true	true	0
MANUAL_ROUTING	string	false	true	
NAME	string	true	true	IOB_X0Y349
NUM_ARCS	int	true	true	9
NUM_BELS	int	true	true	7
NUM_INPUTS	int	true	true	12
NUM_OUTPUTS	int	true	true	5
NUM_PINS	int	true	true	17
PRIMITIVE_COUNT	int	true	true	0
PROHIBIT	bool	false	true	0
PROHIBIT_FROM_PERSIST	bool	true	true	0
RPM_X	int	true	true	1
RPM_Y	int	true	true	698
SITE_PIPS	string	false	true	
SITE_TYPE	enum	true	true	IOB33

The properties assigned to SITE objects are the same for all SITE_TYPEs. To report the properties for any of the SITE_TYPEs listed above, you can use the report_property command:

report_property -all [lindex [get_sites -filter {SITE_TYPE == <SITE_TYPE>}] 0]

Where <SITE_TYPE> should be replaced by one of the listed SITE types. For example:

report_property -all [lindex [get_sites -filter {SITE_TYPE == DSP48E1}] 0] 
report_property -all [lindex [get_sites -filter {SITE_TYPE == RAMB36E1}] 0] 
report_property -all [lindex [get_sites -filter {SITE_TYPE == IBUFDS_GTE2}] 0]