DIAGRAM - 2024.1 English

Vivado Design Suite Properties Reference Guide (UG912)

Document ID
UG912
Release Date
2024-05-30
Version
2024.1 English

Description

A block design (.bd), is a complex system of interconnected IP cores created in the IP integrator of the Vivado Design Suite. The Vivado IP integrator lets you create complex system designs by instantiating and interconnecting IP from the Vivado IP catalog. A block design is a hierarchical design which can be written to a file (.bd) on disk, but is stored as a diagram object within the Vivado tool memory.

Block designs are typically constructed at the interface level for increased productivity, but can also be edited at the port or pin level, to provide greater control. A Vivado Design Suite project can incorporate multiple diagrams, at different levels of the design hierarchy, or can consist of a single diagram as the top-level design.

Related Objects

As seen in Figure 1, the diagram object contains other IP integrator block design (bd) objects such as bd_cells, bd_nets, and bd_ports. The relationship between these objects is similar to the relationship between the standard netlist objects of cells, pins, and nets. You can get each object of the Block Design: cell, address space, address segment, net, pin, port, interface net, interface pin, and interface port from a specified diagram object.

For instance, get the nets of the Block Design with the following Tcl command:

get_bd_nets -of_objects [current_bd_design]

Properties

The following table lists the properties assigned to a diagram object in the Vivado Design Suite, with example values:

Property	Type	Read-only	Visible	Value
CLASS	string	true	true	diagram
COLOR	string	false	true	
FILE_NAME	string	true	true	design_1.bd
NAME	string	true	true	design_1
USE_IP_SHARED_DIR	bool	false	true	1

The properties of the diagram object can be reported using the following command:

report_property -all [lindex [get_bd_designs] 0]