Properties Information - 2024.1 English

Vivado Design Suite Properties Reference Guide (UG912)

Document ID
UG912
Release Date
2024-05-30
Version
2024.1 English

This chapter provides information about AMD Vivado™ Design Suite properties. The entry for each property contains the following information, where applicable:

  • Description of the property, including its primary uses.
  • The AMD FPGA Architectures supporting the property, including AMD UltraScale™ architecture devices, except where specifically noted.
  • The Applicable Objects or device resources supporting the property.
  • Possible Values that can be assigned to the property.
  • Syntax specifications, including Verilog, VHDL, and XDC where applicable.
  • Affected Steps in the design flow where the property has influence.
  • Related Information cross references to related properties.
Note: When a property is defined in both HDL code and as a constraint in the XDC file, the XDC property takes precedence and overrides the HDL property.

For more information on the use of these properties within the Vivado Design Suite, refer to the Vivado Design Suite User Guide: Using Constraints (UG903).