IN_TERM - 2023.2 English

Vivado Design Suite Properties Reference Guide (UG912)

Document ID
UG912
Release Date
2023-11-01
Version
2023.2 English

IN_TERM specifies an uncalibrated input termination impedance value. The termination is present constantly on inputs, and on bidirectional pins whenever the output buffer is 3-stated.

Important: For UltraScale architecture ODT is to be used instead of IN_TERM to specify uncalibrated termination.

IN_TERM is supported on High Range (HR) bank inputs only. For inputs in High Performance (HP) banks, specify a digitally controlled impedance (DCI) IOSTANDARD for on-chip termination.

While the 3-state split-termination DCI is calibrated against external reference resistors on the VRN and VRP pins, the IN_TERM property invokes an uncalibrated split-termination option using internal resistors that have no calibration to compensate for temperature, process, or voltage variations. This option has target Thevenin equivalent resistance values of 40Ω, 50Ω, and 60Ω. For more information refer to the 7 Series FPGAs SelectIO Resources User Guide (UG471).

Architecture Support
7 series FPGAs on High Range (HR) bank inputs only.
Applicable Objects
Input or bidirectional ports (get_ports)
Values
  • NONE (default)
  • UNTUNED_SPLIT_40
  • UNTUNED_SPLIT_50
  • UNTUNED_SPLIT_60

Syntax

Verilog Syntax

To set this attribute, place the proper Verilog attribute syntax before the top-level input or bidirectional port declaration.

(* IN_TERM = "{NONE|UNTUNED_SPLIT_40|UNTUNED_SPLIT_50|UNTUNED_SPLIT_60}" *)

Verilog Syntax Example:

// Sets an on-chip input impedance of 50 Ohms to input ACT5 
(* IN_TERM = "UNTUNED_SPLIT_50" *) input ACT5,
VHDL Syntax

Declare the VHDL attribute as follows:

attribute IN_TERM : string;

Specify the VHDL attribute as follows:

attribute IN_TERM of port_name : signal is value;

Where port_name is a top-level input or bidirectional port.

VHDL Example Syntax:

ACT5 : in std_logic; 
attribute IN_TERM : string;
-- Sets an on-chip input impedance of 50 Ohms to input ACT5 attribute IN_TERM of ACT5 : signal is “UNTUNED_SPLIT_50”;
XDC Syntax
set_property IN_TERM value [get_ports port_name]

Where:

  • IN_TERM can be assigned to port objects, and nets connected to port objects.
  • port_name is an input or bidirectional port.

XDC Example Syntax:

# Sets an on-chip input impedance of 50 Ohms to input ACT5 
set_property IN_TERM UNTUNED_SPLIT_50 [get_ports ACT5]

Affected Steps

  • I/O Planning
  • Report Noise
  • Report Power