MIG_FLOORPLAN_MODE - 2024.1 English

Vivado Design Suite Properties Reference Guide (UG912)

Document ID
UG912
Release Date
2024-05-30
Version
2024.1 English

The MIG_FLOORPLAN_MODE guides the tool to perform placement of memory interface (MIG) logic instances for UltraScale and UltraScale+ devices. The MIG_FLOORPLAN_MODE is applied to the hierarchical cell of the memory interface. In most designs, the memory interface logic will be placed to the right of the I/O Column containing the memory interface. This placement results in consistent timing for the memory interface logic.

If a parent hierarchy of the memory interface is assigned to a Pblock that does not fully cover an SLR, the default placement behavior of the memory interface logic will be overridden, and the memory interface can be placed on both sides of the I/O Column. This is often undesirable because it creates timing closure challenges for the memory interface. In order to force the placement of the memory interface logic to the right of the I/O Column, the MIG_FLOORPLAN_MODE can be set to FULL.

In cases where it is not necessary to place the memory interface logic to the right of the I/O Column, the MIG_FLOORPLAN_MODE can be set to NONE allowing the memory interface logic to be placed on both sides of the I/O Column.

Architecture Support
UltraScale, UltraScale+
Applicable Objects

Cell (get_cells)

The cell specified should be the hierarchy of the Memory Interface (MIG) Instance.

Values
  • NONE: Allow the memory interface logic to be placed on both sides of the I/O Column
  • AUTO: Tool determines the placement of the memory interface logic (default)
  • FULL: Force the memory interface logic to the right of the I/O Column
  • PHY_ONLY: Reserved for future use

Syntax

Verilog Syntax

Not applicable

VHDL Syntax

Not applicable

XDC Syntax
set_property MIG_FLOORPLAN_MODE <NONE | AUTO | FULL | PHY_ONLY> [get_cells <hier_of_mig_inst>]

XDC Syntax Examples:

# Force the memory interface logic placement to the right of the I/O Column 
set_property MIG_FLOORPLAN_MODE FULL [get_cells example_top_inst_3/u_ddr4_0] 
set_property MIG_FLOORPLAN_MODE FULL [get_cells example_top_inst_1/u_ddr4_0]

# Allow the memory interface logic placement on both sides of the I/O Column 
set_property MIG_FLOORPLAN_MODE NONE [get_cells example_top_inst_2/u_ddr4_0]

Affected Steps

  • Place Design