KEEPER - 2024.1 English

Vivado Design Suite Properties Reference Guide (UG912)

Document ID
UG912
Release Date
2024-05-30
Version
2024.1 English
Important: The KEEPER property has been deprecated and should be replaced by PULLTYPE.

KEEPER applies a weak driver on a tri-stateable output or bidirectional port to preserve its value when not being driven. The KEEPER property retains the value of the output net to which the port is attached.

For example, if logic 1 is being driven through the specified port, KEEPER drives a weak or resistive 1 through the port. If the net driver is then tri-stated, KEEPER continues to drive a weak or resistive 1 onto the net, through the connected port, to preserve that value.

Input buffers (e.g., IBUF), 3-state output buffers (e.g., OBUFT), and bidirectional buffers (e.g., IOBUF) can have a weak pull-up resistor, a weak pull-down resistor, or a weak “keeper” circuit. This feature can be invoked by adding the PULLTYPE property with one of the following values to the port object connected to the buffer:

  • PULLUP
  • PULLDOWN
  • KEEPER
Note: When this attribute is applied, the KEEPER functionality will not be shown during RTL simulation which can create a functional difference between RTL simulation and the implemented design. This functionality can be verified using a gate-level simulation netlist or else the PULLDOWN UNISIM might be instantiated in the design in place of using this property in order to reflect this behavior in the RTL simulation.
Architecture Support
All architectures.
Applicable Objects
Ports (get_ports): Apply to any top-level port
Values
  • TRUE|YES: Use a keeper circuit to preserve the value on the net connected to the specified port.
  • FALSE|NO: Do not use a keeper circuit (default).

Syntax

Verilog Syntax

Place the Verilog constraint immediately before port definition. Specify the Verilog constraint as follows:

(* KEEPER = " {YES|NO|TRUE|FALSE}" *)
VHDL Syntax

Declare and specify the VHDL constraint as follows:

attribute keeper: string;
attribute keeper of signal_name : signal is “{YES|NO|TRUE|FALSE}”;
XDC Syntax
set_property KEEPER {TRUE|FALSE} [get_ports port_name]

Where port_name is the name of an input, output, or inout port.

XDC Syntax Example:

# Use a keeper circuit to preserve the value on the specified port 
set_property KEEPER TRUE [get_ports wbWriteOut]

Affected Steps

  • Logical to Physical Mapping