MAX_FANOUT_MODE - 2024.1 English

Vivado Design Suite Properties Reference Guide (UG912)

Document ID
UG912
Release Date
2024-06-05
Version
2024.1 English

You can force replication based on physical device attributes with the MAX_FANOUT_MODE property. The property can take on the value of CLOCK_REGION, SLR, or MACRO. For example, the MAX_FANOUT_MODE property with a value of CLOCK_REGION replicates the driver based on the physical clock region, the loads placed into same clock region will be clustered together. The MAX_FANOUT_MODE property takes precedence over the FORCE_MAX_FANOUT property and physical synthesis will try to honor both by applying MAX_FANOUT_MODE-based optimization first and then all its replicated drivers will inherit the FORCE_MAX_FANOUT property to do further replication within a clock region.

Architecture Support
All architectures.
Applicable Objects
Nets (get_nets) directly connected to the output of a Register (FD, FDCE, FDPE, FDRE, FDSE) or LUT (LUT1, LUT2, LUT3, LUT4, LUT5, LUT6, LUT6_2).
Values
CLOCK_REGION, SLR, MACRO: Directs the tool replicate the driver per object specified. MACRO loads are Block RAM, UltraRAM, or DSP.

Syntax

Verilog Syntax

Not applicable

VHDL Syntax

Not applicable

XDC Syntax
set_property MAX_FANOUT_MODE <value> [get_nets <net_name>]

Affected Steps

  • Place Design