The CELL_BLOAT_FACTOR property lets you specify the addition of “whitespace” or increased cell spacing to increase placement distance between the cells of a hierarchical module. The Vivado placer will space out the cells in the module to improve routing results of the design.
You can use cell bloating, when the placement of cells from a module is close together and causing congestion, to insert whitespace during the placement step. This leads to a lower density of cells in a given area of the die, which can reduce congestion by increasing available routing resources. This technique is particularly effective in small, congested areas of relatively high-performance logic.
To use cell bloating, apply the CELL_BLOAT_FACTOR property to cells and set the value to LOW, MEDIUM, or HIGH.
HIGH is the recommended setting when working with smaller modules of several hundred cells. Using cell bloating on larger modules might force the placed cells of the module to be too far apart.
Architecture Support
All architectures.
Applicable Objects
Cells (get_cells)
Value
LOW | MEDIUM | HIGH: Specifies the relative spacing between the cells of an
hierarchical module.
Syntax
- VHDL Syntax
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Not applicable
- Verilog Syntax
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Not applicable
- XDC Syntax
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set_property CELL_BLOAT_FACTOR <value> <objects>XDC Syntax Example:
The following assigns a CELL_BLOAT_FACTOR property to the cpuEngine module:
set_property CELL_BLOAT_FACTOR high [get_cells { cpuEngine }]
Affected Steps
- Place Design
- Routing (Route Design)