Frame Filter Configuration - 9.0 English

Tri-Mode Ethernet MAC LogiCORE IP Product Guide (PG051)
Document ID
PG051
Release Date
2023-11-07
Version
9.0 English

The following tables describe the registers used to access the optional frame filter configuration when the TEMAC solution is implemented with a frame filter. In addition to the unicast address, broadcast address, and pause addresses, the frame filter can optionally be generated to respond to up to 16 additional configurable frame filter matches. These are stored in an address table within the frame filter. See Frame Filter.

If no frame filter is present, these registers do not exist and return 0s for a read from the stated addresses.

The following table shows the frame filter configuration registers.

Table 1. Frame Filter Configuration
Address (Hex) Description
0x700 Table 2
0x704 Table 3
0x708 Table 4
0x70C Table 5
0x710 Frame Filter Value Bytes 3-0
0x714 Frame Filter Value Bytes 7-4
0x718 Frame Filter Value Bytes 11-8
0x71C Frame Filter Value Bytes 15-12
0x720 Frame Filter Value Bytes 19-16
0x724 Frame Filter Value Bytes 23-20
0x728 Frame Filter Value Bytes 27-24
0x72C Frame Filter Value Bytes 31-28
0x730 Frame Filter Value Bytes 35-32
0x734 Frame Filter Value Bytes 39-36
0x738 Frame Filter Value Bytes 43-40
0x73C Frame Filter Value Bytes 47-44
0x740 Frame Filter Value Bytes 51-48
0x744 Frame Filter Value Bytes 55-52
0x748 Frame Filter Value Bytes 59-56
0x74C Frame Filter Value Bytes 63-60
0x750 Frame Filter Mask Value Bytes 3-0
0x754 Frame Filter Mask Value Bytes 7-4
0x758 Frame Filter Mask Value Bytes 11-8
0x75C Frame Filter Mask Value Bytes 15-12
0x760 Frame Filter Mask Value Bytes 19-16
0x764 Frame Filter Mask Value Bytes 23-20
0x768 Frame Filter Mask Value Bytes 27-24
0x76C Frame Filter Mask Value Bytes 31-28
0x770 Frame Filter Mask Value Bytes 35-32
0x774 Frame Filter Mask Value Bytes 39-36
0x778 Frame Filter Mask Value Bytes 43-40
0x77C Frame Filter Mask Value Bytes 47-44
0x780 Frame Filter Mask Value Bytes 51-48
0x784 Frame Filter Mask Value Bytes 55-52
0x788 Frame Filter Mask Value Bytes 59-56
0x78C Frame Filter Mask Value Bytes 63-60

The contents of each configuration register are shown in the following tables.

Table 2. Unicast Address (Word 0) (0x700)
Bits Default Value Type Description
31:0 unicast_address[31:0] R/W Frame filter unicast address[31:0]: This address is used by the MAC to match against the destination address of any incoming frames. The address is ordered so the first byte transmitted/received is the lowest positioned byte in the register. For example, a MAC address of AA-BB-CC-DD-EE-FF would be stored in Address[47:0] as 0xFFEEDDCCBBAA.
Table 3. Unicast Address (Word 1) (0x704)
Bits Default Value Type Description
31:16 N/A RO Reserved
15:0 unicast_address[47 downto 32] R/W Frame filter unicast address[47:32]: See description in See Unicast Address (Word 0) (0x700).
Table 4. Frame Filter Control (0x708)
Bits Default Value Type Description
31 1 R/W Promiscuous Mode: If this bit is set to 1, the frame filter is set to operate in promiscuous mode. All frames are passed to the receiver client regardless of the destination address.
30:9 N/A RO Reserved
8 0 R/W AVB Select : If the AVB Endpoint is present. This is used to indicate that the filter to be selected is one of the three dedicated filters.
7:4 N/A RO Reserved
3:0 0 R/W Filter Index : All frame filters are mapped to the same location with the filter index and AVB Select, specifying which physical filter is to be accessed. When an AVB filter is being selected only indexes of 0-2 are allowed.
Table 5. Frame Filter Enable (0x70C)
Bits Default Value Type Description
31:1 N/A RO Reserved
0 1 R/W Filter Enable: This enable relates to the physical frame filter pointed to by the Filter index and take the value of AVB Select into account. If clear, the filter passes all packets.
Table 6. Frame Filter Value (0x710-0x74C)
Bits Default Value Type Description
31:0

Bits[47:0] = 1

All other = 0

 R/W

Filter Value

All filter value registers have the same format.

The lower 31 bits of filter value, at address 0x710, relating to the filter at physical Frame Filter index that is to be written to the address table. The value is ordered so that the first byte transmitted/received is the lowest positioned byte in the register. For example, a MAC address of AA-BB-CC-DD-EE-FF would be stored in Filter Value[47:0] as 0xFFEEDDCCBBAA.

By default, the frame filters are configured to match against the broadcast address.
Table 7. Frame Filter Mask Value (0x750-0x790)
Bits Default Value Type Description
31:0

Bits[47:0] = 1

All other = 0

 R/W

Mask Value.

All mask value registers have the same format.

If a mask bit is set to 1, the corresponding bit of the Filter Value is compared by the frame filter. For example, if a basic Destination address comparison was desired, Bits[47:0] should be written to 1 and all other bits to 0.