The following figure shows the MAC user
immediately ready to transmit a second frame of data following completion of its first
frame. In this figure, the end of the first frame is shown on the left with the assertion of
tx_axis_mac_tlast . On the cycle, immediately following the
final byte of the first frame, tx_axis_mac_tvalid remains
High to indicate that the first byte of the destination address of the second frame is on tx_axis_mac_tdata awaiting transmission.
When the MAC core is ready to
accept data, tx_axis_mac_tready is
asserted and the transmission continues in the same manner as in
the case of the single frame. The MAC core defers the assertion of
tx_axis_mac_tready appropriately to
comply with inter-packet gap requirements and flow control
requests.
If the MAC core is operating at 1 Gbps
in half-duplex mode, the timing shown in the following figure is required to take advantage
of frame bursting. The MAC core is only guaranteed to retain control of the medium if the tx_axis_mac_tvalid signal is High immediately after the end of
the previous packet. For details on frame bursting, see IEEE 802.3-2008.