The core supplied for 1 Gbps operation provides either a GMII or RGMII interface. These are typically used to connect the MAC to an external PHY device. The GMII defined in IEEE Std 802.3-2008 clause 35, is used to connect a 1 Gbps capable MAC to the physical sublayers.
The voltage standard used depends on the type of I/O used: HR I/O supports GMII at 3.3 V or lower and HP I/O only supports 1.8 V or lower. Therefore an external voltage converter is required to interoperate with any multi-standard PHY for GMII. The RGMII is an alternative to the GMII and achieves a 50% reduction in the pin count compared with GMII. Therefore, this is often favored over GMII by Printed Circuit Board (PCB) designers. This configuration is achieved with the use of double-data-rate (DDR) flip-flops.
The voltage standard used depends on the type of I/O used: HR I/O supports RGMII at 2.5 V or lower and HP I/O only supports 1.8 V or lower. Despite this being the defined RGMII voltage, most PHYs require 2.5 V and therefore an external voltage converter is required to interoperate with any multi-standard PHY for RGMII.