RTC Nanoseconds Field Offset Control - 9.0 English

Tri-Mode Ethernet MAC LogiCORE IP Product Guide (PG051)

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The following table describes the offset control register for the nanoseconds field of the RTC used to force step changes into the counter. When in PTP clock master mode, this can be used to set the initial value following power-up. While in PTP clock slave mode, the software drivers use this register to implement the periodic step corrections.

This register and the registers defined in RTC Seconds Field Offset Control are linked. These three offset values are loaded into the RTC counter logic simultaneously following a write to this nanosecond offset register.

Table 1. RTC Nanoseconds Field Offset (0x12800)
Bits Default Value Type Description
31:30 0 RO Reserved
29:0 0 R/W 30-bit offset value for the RTC nanoseconds. Used by the microprocessor to initialize the RTC, then to perform the regular RTC corrections (In slave mode).