Feature Summary - 9.0 English

Tri-Mode Ethernet MAC LogiCORE IP Product Guide (PG051)

Document ID
PG051
Release Date
2023-11-07
Version
9.0 English

The key features of the TEMAC solution are:

  • Designed to the IEEE Std 802.3-2008 specification
  • Supports five separate IP cores
  • 10/100/1000 Mbps Ethernet MAC
  • 1 Gbps Ethernet MAC
  • 2.5 Gbps Ethernet MAC
  • 10/100 Mbps Ethernet MAC
  • Optional Ethernet AVB
  • Configurable duplex operation
  • Support for MII, GMII, RGMII, and connection to the Ethernet 1G/2.5G PCS/PMA or SGMII LogiCORE.
  • Optional Management Data Input/Output (MDIO) interface to manage objects in the physical layer
  • User-accessible raw statistic vector outputs
  • Optional built-in statistics counters
  • Optional built-in Ethernet AVB Endpoint designed to the following IEEE specifications
  • IEEE802.1AS – Supports clock master functionality, clock slave functionality, and the Best Master Clock Algorithm (BMCA)
  • IEEE802.1Qav – Supports arbitration between different priority traffic and implements bandwidth policing
  • Support for VLAN frames
  • Configurable interframe gap (IFG) adjustment in full-duplex operation
  • Configurable in-band Frame Check Sequence (FCS) field passing on both transmit and receive paths
  • Auto padding on transmit and stripping on receive paths
  • Optional full memory mapped AXI4-Lite interface for configuration and monitoring
  • Configurable flow control through Ethernet MAC Control PAUSE frames; symmetrically or asymmetrically enabled. Optional support for Priority-based Flow Control, in both directions, as defined in IEEE specification 802.1Qbb.
  • Configurable support for jumbo frames of any length
  • Configurable maximum frame length check
  • Configurable receive frame filter
  • AXI4-Stream user interface for Transmit and Receive frame datapath.