Although Figure 1 illustrates the rx_axis_mac_tlast signal asserted immediately after a cycle
containing valid data on rx_axis_mac_tdata , this is not
usually the case.
The rx_axis_mac_tlast and rx_axis_mac_tuser signals are
asserted along with the final byte of the transfer, only after all frame checks are
completed. This is after the FCS field has been received (and after reception of carrier
extension, if present). This is shown in the following figure.
Figure 1. Frame Reception TLast Timing
Therefore, rx_axis_mac_tlast and possibly rx_axis_mac_tuser are
asserted following frame reception at the beginning of the interframe gap.