RX PTP Packet Buffer Address Space - 9.0 English

Tri-Mode Ethernet MAC LogiCORE IP Product Guide (PG051)

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9.0 English

The RX PTP Packet buffers are only available when the AVB functionality is included in the TEMAC core. The Address space of the RX PTP Packet Buffer is 4K in total. This represents the size of a single FPGA block RAM pair (4K). Every byte of this block RAM can be read.

This address space is divided equally into 16 separate buffers of 256 bytes, each of which is capable of storing a unique PTP frame. When received, a PTP frame is written into one of these buffers. The buffer write pointer increments and points to the next buffer in preparation for the subsequent PTP frame reception.

Within each buffer, the entire PTP frame is written (from MAC Destination Address to the last byte from the data field), starting at the base address of that buffer. Following PTP frame reception, the RX timestamp captured for that frame is written into the top 4 bytes of the buffer used. A list of the RX PTP Buffers is shown in the following table.

Table 1. RX PTP Buffers
Address (Hex) Description
0x10000-0x100FC RX PTP Buffer 0
0x10100-0x101FC RX PTP Buffer 1
0x10200-0x102FC RX PTP Buffer 2
0x10300-0x103FC RX PTP Buffer 3
0x10400-0x104FC RX PTP Buffer 4
0x10500-0x105FC RX PTP Buffer 5
0x10600-0x106FC RX PTP Buffer 6
0x10700-0x107FC RX PTP Buffer 7
0x10800-0x108FC RX PTP Buffer 8
0x10900-0x109FC RX PTP Buffer 9
0x10A00-0x10AFC RX PTP Buffer 10
0x10B00-0x10BFC RX PTP Buffer 11
0x10C00-0x10CFC RX PTP Buffer 12
0x10D00-0x10DFC RX PTP Buffer 13
0x10E00-0x10EFC RX PTP Buffer 14
0x10F00-0x10FFC RX PTP Buffer 15