Syntax Example (XDC) - 2022.1 English

Vivado Design Suite User Guide: Synthesis (UG901)

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2022.1 English

# Marks an internal wire for debug

set_property MARK_DEBUG TRUE [get_nets debug_wire]


Often, the use of MARK_DEBUG is on pins of hierarchies, and can be used on any elaborated sequential element, such as RTL_REG. MARK_DEBUG attributes are intended go on nets. It is recommended that you use both the get_nets and the get_pins command as shown, such as: set_property MARK_DEBUG true [get_nets -of [get_pins\ hier1/hier2/<flop_name>/Q]]. This recommended use ensures that the MARK_DEBUG goes onto the net connected to that pin, regardless of its name.

Note:   If a MARK_DEBUG is applied on a bit of a signal that was declared as a bit_vector, the whole bus will get the MARK_DEBUG attribute. In addition, if a MARK_DEBUG is placed on a pin of a hierarchy, the full hierarchy will be kept.